The present invention relates to a semiconductor memory device and a memory system, and principally to a high storage capacity type dynamic RAM (Random Access Memory) and a technique effective for use in a data holding technique employed in a memory system using the dynamic RAM.
There has been known a dynamic RAM wherein an oscillator, having an oscillating period or cycle which varies depending on the temperature, is provided to vary a refresh period or cycle according to a change in temperature, thereby reducing a data holding current that flows during self-refresh. This type of dynamic RAM has been disclosed in Japanese Patent Application Laid-Open No. 5-6663. There has been also known a dynamic RAM of a type wherein a plate voltage applied to each of dynamic memory cells is lowered during self-refresh to reduce a leakage current that flows through the dynamic memory cell. This type of dynamic RAM has been disclosed in the 1995 IEEE international Solid-State Circuit Conference, ISSCC 95/SESSION 14/DRAM/PAPER FA14, 1, "A Sub-0.5.mu. A/MB DATA-Retention DRAM".
In the former dynamic RAM, the oscillator, whose oscillating cycle varies depending on the temperature, automatically sets the optimum refresh cycle with respect to a change in data holding time due to a variation in ambient temperature of the dynamic RAM in order to minimize the data holding current in the self-refresh mode.
Now, the decision of the data holding time of each dynamic memory cell is made to cope with a leakage current developed in a PN junction dependent on structures of a MOSFET and a capacitor both of which constitute each memory or at an interface between a silicon substrate and an oxide film. It has been known that ones of the memory cells in the dynamic RAM, having data-holding times that relatively greatly depend on temperatures and a source voltage, command about 0.1% of the number of the entire memory cells. Further, memory cells (hereinafter called "worst memory cells") of a small number of these memory cells, which are shortest in data holding time, will determine the whole data holding time of the dynamic RAM.